Paris -- Atmel Corp. has developed a high-performance 32-bit RISC processor core with an instruction-set architecture designed from the ground up to increase computational throughput per cycle.
Atmel's design goal for the AVR32 was a processor that could efficiently handle increasingly intensive signal-processing tasks at very low power--a prerequisite for portable consumer multimedia devices. Further, the core was built to perform both MPU and DSP functions, while requiring only a single design flow and one set of development tools.
The AVR32 was developed by Atmel's 20-person engineering team in Trondheim, Norway. The team claims the AVR32 achieves 35 percent more throughput per instruction cycle than an ARM11 core when used to run such target algorithms as sum of absolute differences and inverse discrete cosine transforms. That translates into the ability to decode quarter-VGA MPEG-4 video at 30 frames/second with a clock frequency of 100 MHz, compared with the 150 to 175 MHz required by the ARM11.
According to Atmel, the AVR32 architecture represents "a collection of good ideas." They include a unique pipe- line architecture with hardware branch prediction, DSP-specific hardware that comes inside the microprocessor pipeline and single-instruction, multiple-data extensions.
"The performance race in microprocessors, in which they typically compete by increasing the clock frequency and adding more gates, is over," said Alf-Egil Bogen, managing director of the AVR Business Unit at Atmel Norway. Instead, the new battle is about how to increase throughput per clock cycle while delivering ultralow power, he declared.
"We took a very academic approach, by going down to every detail of the microprocessor architecture to achieve higher throughput and optimized code density," said Øyvind Strøm, a chip architect at Atmel Norway.
Atmel, however, may be coming late to the 32-bit RISC processor market, which is already dominated by established players like ARM and MIPS Technologies. In fact, many of those microprocessors are moving to "add DSP-oriented features" in similar fashion to the AVR32, said Jeff Bier, president of Berkeley Design Technology Inc.
But Atmel's engineers are unfazed, pointing to the success of the AVR8, also developed by the Norwegian team. That chip came out in the late 1990s and is still one of the fastest-growing 8-bit microcontrollers on the market. With the AVR32, "We want to rock the world a little bit," said Bogen.
Then, how does AVR32 differ from other RISC processors?
"At a high level, the AVR32 architecture is very similar to the ARM11 and MIPS24KEc architectures," Berkeley Design's Bier observed. "The AVR32 appears to use most of the techniques that you would expect from a microprocessor targeting signal- and media-processing applications."
Important features include a separate load/store pipeline; branch prediction with branch folding; SIMD techniques, such as the ability to do two 16-bit operations with a single instruction; a 16/32-bit instruction set (freely mixed; no mode change required); and the ability to perform sum-of-absolute-differences algorithms, which accelerate video compression.
"None of these features is unique to the AVR32," Bier said, but looking further into the AVR32 architectural details reveals elements that "differ significantly from those of the ARM11 and MIPS24KEc, and these differences may give the AVR32 some advantages."
For example, because of the way their pipelines work, the ARM11 and MIPS24KEc have multicycle latencies associated with some important instructions. "This makes it challenging for a compiler or assembly language programmer to achieve maximum performance," Bier said. But "this may be less of a problem on the AVR32."
More specifically, Atmel supports "out-of-order" execution in its AVR32's multiple pipe-lines, Strøm said.