There are a variety of different Structured ASIC fabrics intended for different purposes. Some are intended for use as standalone devices, for example, while others are provided in the form of IP that is used as part of a larger design, such as the configurable portion of a System-on-Chip (SoC).
In order to satisfy the requirements of the reconfigurable SoC market, ViASIC (www.viasic.com) have introduced a new Structured ASIC fabric called DuoMask. There are two key aspects to this new fabric: (a) it's based on standard cells from existing foundry-supplied libraries and (b) it's based on the technique known as "standard metal".
Let's take these points in order. A lot of Structured ASIC fabrics are based on proprietary cells (logic functions). This means that when a fab introduces a new technology node, these cells have to be re-implemented at the polygon level from the ground up. This is expensive and time-consuming. Thus, the fact that the DuoMask fabric is based on standard library cells allows ViASIC to quickly make this fabric available across multiple foundries, processes, and technology nodes.
Riding above the logic functions are the metallization and via layers that are used to configure the various logic functions at to form the tracks linking these functions. Some Structured ASIC fabrics involve building these tracks from the ground up. This provides faster signals, but it can require a relatively large number of routing layers (say 3, 4, or more) and associated via layers. Also, it can open the door to signal integrity issues, and solving these issues can impact the development time of the device.
The alternative is to pre-implement all of the track segments, and then use only one or two via layers to configure the underlying logic functions and to connect ("turn on/off") the various track segments. This approach, which is referred to as "Standard Metal" is the one used by the DuoMask fabric. The advantage here is that the vast majority of parasitic effects and timing delays have been strongly pre-characterized, which greatly eases the task of performing timing calculations and achieving timing closure. Also, it means that the vast majority of any signal integrity issues have already been addressed.
Price and availability
DuoMask is immediately available for all digital processes between .35 micron and .45 nanometers. U.S. pricing starts at $95,000.
DuoMask and ViaPath (a place and route tool for standard-metal structured ASICs) will be demonstrated at the Design Automation Conference in San Francisco on July 24 at booth 1108. If you wish to set up a private suite appointment, email firstname.lastname@example.org.