Santa Clara, Calif.For backplane and cable applications that require high noise margin, National Semiconductor Corp. has developed four multi-point LVDS line drivers and receivers that can support up to 32 loads of clock frequencies up to 100-MHz and data rates up to 200-Mbits/s.
Compliant to the EIA/TIA-899 M-LVDS standard, the DS91C176, DS91D176, DS91C180, and DS91D180 transceivers are suitable for clock distribution in Advanced Telecom and Computing Architecture (ATCA) platforms or other multipoint backplanes. They are designed specifically for multi-point bus applications in which a common bus connects multiple drivers and receivers.
The ATCA standard specifies M-LVDS as the interface for backplane synchronization clocks.
For more details on the ATCA standard, click here: www.picmg.org/newinitiative.stm. To learn about the ATCA summit, click here: www.advancedtcasummit.com/.
To achieve what the company claims is the highest noise margin in backplanes at frequencies up to 100-MHz, the transceivers are equipped with feature balanced, controlled edge rates and feedback-enhanced outputs that maintain constant amplitude over a wide range of load conditions.
"The more noise margin, the better," said Ken Filliter, Interface Marketing Manager, at National. "The problem with backplanes is that you have to assume a very wide spectrum of possibilities. It could be a fully loaded backplane and the driver can be in the middle or at the end. You don't know exactly what load you're driving and you have a wide range of frequencies, such as in ATCA, so noise margin is critical because it's not a defined environment, it's a variable environment."
|National Semiconductor's four multipoint-low voltage differential signaling (M-LVDS) line drivers and receivers provide highest noise margin for high-speed clock and data transfers.|
Noise margin is the difference between the actual value of a parameter and the value of the parameter at which errors or failure will occur. In the case of M-LVDS, the standard requires an output VOD (amplitude) of between 480-mV and 650mV when driving 50 ohms, Filliter explained.
"The guaranteed input threshold is 50-mV so in the ideal case with a typical VOD of 550-mV, we have about 500-mV of noise marginin other words a lot."
In a real world application, there are reflections and noise that reduce VOD and often effective impedance of less then 50-ohms. In an ATCA backplane, for example, the nominal load is 80 ohms at each end; therefore, 40-ohms in parallel. To achieve high noise margin, National's M-LVDS drivers maintain an almost constant VOD across loads from 30 to 100-ohms, according to Filliter.
"In a backplane, the impedance may vary depending on the number of cards present and the input capacitance of the receivers. We reduce this variability by maintaining the same VOD over the impedance range of interest," he said.
To further reduce noise margin, the DS91C176, DS91D176, DS91C180, and DS91D180 transceivers feature controlled edge rates. By keeping its edges slow (about 2-ns typical), National was able to reduce the amount of ringing, which helps maintain signal amplitude. Slower edges have less high frequency content, and therefore fewer reflections from unterminated stubs.
"Constant VOD at the output of the driver and controlled smooth slow edges are the two ways we maximize noise margin," he said.
In addition to multi-drop backplanes, M-LVDS can potentially replace RS-485. "M-LVDS can support 32-plus loads and has excellent cable drive characteristics," he said.
For distances below 100M, M-LVDS can support much higher data rates, using much less power and generating a lot less EMI. The M-LVDS common mode is relatively wide at −1.4-V to +3.8-V. Although it isn't as wide as RS-485 at −7-V to +12-V), it is still suitable for many applications.
National's application note AN-1503, "Designing an Advanced TCA-Compliant M-LVDS Clock Distribution Network," explains and summarizes test results. The AN-1503 note is available at www.national.com/an/AN/AN-1503.pdf.
Available in 8-pin SOIC narrow packages, the DS91C176 and DS91D176 are M-LVDS differential, half-duplex transceivers that accept LVTTL/LVCMOS signals at the driver input and convert them to differential M-LVDS signal levels. They operate up to 100-MHz for clocks and 200-Mbits/s for data. The receiver inputs accept low-voltage differential signals (LVDS, B-LVDS, M-LVDS and LV-PECL) and convert them to 3-V LVCMOS signals. The DS91C176 receiver contains an M-LVDS type 2 fail-safe circuit with an internal 100-mV offset that provides a LOW output for both short and open-input conditions.
For more information on the DS91C176 and DS91D176 or to order samples, visit www.national.com/pf/DS/DS91C176.html
An evaluation board for the DS91D176 is also available at www.national.com/store/view_item/index.html?nsid=DS91D176TEVK.
Available in 14-pin SOIC narrow packages, the DS91D180 and DS91C180 contain a full-duplex M-LVDS line driver and receiver. They operate up to 100-MHz for clocks and 200-Mbits/s for data. The driver input accept LVTTL/LVCMOS signals and convert them to differential M-LVDS signal levels. The receiver accepts low-voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL) and converts them to 3-V LVCMOS signals.
The DS91C180 receiver contains an M-LVDS type 2 fail-safe circuit with an internal 100 mV offset that provides a LOW output for both short and open input conditions.
For more information on the DS91C180 and DS91D180 or to order samples, visit www.national.com/pf/DS/DS91C180.html
Available now, the DS91C176, DS91D176, DS91C180 and DS91D180 are priced at $1.85 each in 1,000-unit quantities.
National Semiconductor Corp., 1-800-272-9959, www.national.com