Xilinx has announced immediate availability of its low cost Spartan-3A FPGA development kit for DDR2 SDRAM interfaces, the Virtex-5 FPGA development platform (ML-561) for multiple high-performance memory interfaces (I/Fs), and the memory interface generator (MIG) software version 1.7. These complete solutions enable FPGA users to quickly implement and verify custom memory interface designs across various data rates and bus widths thus accelerating time-to- market.
The solutions, including device characterization, data capture circuitry, and memory controller, are all fully verified in hardware using memory devices from industry leaders such as Micron Technology.
"Micron and Xilinx have a common objective to provide and validate complete memory solutions for a spectrum of applications from lowest cost to highest-performance," said Jim Cooke, director of applications engineering for Micron's memory group. "We have been working together for many years to ensure our memory devices work seamlessly with Xilinx FPGAs. Our latest DDR2 SDRAMs with Spartan-3 generation and Virtex-5 FPGAs, provide customers with flexible choices to meet low-cost and high-performance system requirements."
Xilinx memory interface solutions are developed using production-qualified 90nm Spartan-3A and 65nm Virtex-5 FPGAs, supporting up to twice the bus-width of any other FPGA based solution shipping today. Low cost memory interfaces can be built rapidly with the I/O optimized Spartan-3A FPGA family while Virtex-5 FPGAs with built-in 75 ps calibration circuits, flexible I/Os to connect memory on any side of the FPGA, and innovative packaging to minimize crosstalk for reliable operation of wide memory interfaces offer the highest bandwidth.
"Memory interfaces and FPGAs have become ubiquitous across all industries from low cost consumer products to high end communication systems. Performance requirements span from 200 Mbps to over 600 Mbps with bus widths wider than 144 bits," said Jag Bolaria, senior analyst at The Linley Group. "Xilinx broad FPGA offerings and memory interface solutions enable designers to develop systems with confidence in a much shorter time."
Low-cost Spartan-3A FPGA development kit with out-of-the-box guarantee
The Spartan-3A FPGA development kit for DDR2 SDRAM interfaces allows designers to get a DDR2 SDRAM interface up and running right out-of-the box in less than an hour. The development kit includes all components needed to complete a low-cost design and more:
- Spartan-3A starter kit board with Spartan-3A (XC3S700A-FG484) FPGA and 32M×16 DDR2 SDRAM device.
- Pre-verified reference designs show 267 Mbps DDR2 SDRAM operation with lowest speed grade Spartan-3A FPGA (Spartan-3A FPGA family supports 333 Mbps today with 400Mbps characterization pending).
- Demonstration files using Xilinx ChipScope Pro in-circuit logic analyzer, enabling users to verify data transfer and control signals.
- Popular parallel and serial interfaces and connectors.
- Evaluation disk containing ISE design software and the ChipScope Pro analyzer.
- USB FPGA download cable.
- Quickstart guide in English, Japanese, Korean, and traditional and simplified Chinese.
High-performance Virtex-5 FPGA development board with multiple memory I/F support
The Virtex-5 FPGA based development platform (ML561) features multiple high-performance memory interfaces and hardware-verified reference designs with in-depth ChipScope Pro demonstration files to enable implementation and verification of the highest bandwidth memory I/Fs:
- 667 Mbps DDR2 SDRAM Registered DIMM with 144 bit I/F.
- 400 Mbps DDR SDRAM.
- 300 MHz QDR II SRAM 72 bit I/F.
- 333 MHz RLDRAM II 36 bit I/F.
Memory Interface Generator (MIG) for ultimate design flexibility and ease-of-use
The MIG is a free, user-friendly parameterizable software tool to create memory interface designs in unencrypted RTL for Xilinx FPGAs, DDR2/DDR SDRAM, QDR II SRAM, and RLDRAM II interfaces. MIG supports multiple memory architectures, device and package combinations that provide system designers with the flexibility to easily customize their own design. The MIG is integrated in the Xilinx CORE Generator software and provides RTL source and constraints files through a graphical interface for ultimate user flexibility. The designs are generated in a modular format to provide distinct physical layer, user interface and controller blocks providing users with simplified verification capabilities.
Pricing and availability
The low cost Spartan-3A development kit for DDR2 SDRAM interface is immediately available for US$235 at www.xilinx.com/s3addr2.
Free download of RTL source reference designs and the Memory Interface Generator (MIG) version 1.7 are immediately available at www.xilinx.com/memory.
The Virtex-5 FPGA based ML-561 platform is immediately available for US$5,995 at www.xilinx.com/ml561
About the Spartan-3A Family
With the addition of an I/O-optimized platform, the Spartan-3 generation FPGAs expand the billion-dollar global market for low-cost FPGAs targeting volume applications on the "edge of the network" in the home, in the car and on the factory floor. The Spartan-3A platform consists of five devices offering up to 1.4 million system gates and 502 I/Os. Offering the lowest cost per I/O in the industry, the new family also features significant advances in power management, device configuration and design security.
About Xilinx Virtex-5 FPGAs
The Virtex-5 family represents the fifth generation in the award-winning Virtex product line. Built upon the industry's most advanced 65nm triple-oxide technology, breakthrough new ExpressFabric technology and proven ASMBL architecture, the Virtex-5 family includes four domain-optimized platforms for high-speed logic, digital signal processing (DSP), embedded processing and serial connectivity applications. Xilinx has been delivering the benefits of 65nm Virtex-5 FPGAs since May 2006, and is now shipping 13 devices across three of the four platforms (LX, LXT, and SXT).