SAN JOSE, Calif. -- Fabless ASIC house eASIC Corp. has added Tensilica Inc. to its intellectual-property (IP) roster.
Through a new partnership, eASIC (Santa Clara, Calif.) now provides ''free access'' to Tensilica's Diamond Standard microprocessor and digital signal processing (DSP) cores.
Tensilica's processors range from a low-power, 32-bit
controller up to a high-performance DSP processing core, according to the Santa Clara-based IP house. eASIC offers structured ASIC devices, with zero mask charges and no minimum order quantity.
"Free Tensilica processors on zero-mask charge structured ASICs is a breakthrough in reducing the upfront costs for customers looking to develop low-cost custom embedded processing systems at any volume," said Jasbinder Bhoot, senior director of marketing at eASIC, in a statement.
"Several of our customers have been attracted to eASIC's Nextreme Structured ASICs for fast prototyping or mass production," added Chris Jones, Tensilica's director of strategic alliances, in a statement. "eASIC's
structured ASIC technology offers customers a lower power, higher density solution than FPGAs at a much lower cost and faster time to market than cell-based ASICs."