Here's an interesting nugget of trivia. The electronics industry currently ships approximately 300 million Programmable Logic Devices (PLDs) a year. These devices are primarily implemented into systems that are on 24 hours a day / 7 days a week. The latest generation of products can reduce power consumption by 1 to 4 Watts per device. If we were to add all of this saved power up across the industry (that is, if we were to replace every previous-generation power-hog with a corresponding latest-generation device) then – assuming an average power saving of 2 Watts per device – the result would be a saving of 600 million watts, which is basically equivalent to a nuclear power plant.
It makes you think, doesn't it?
All of this leads us nicely into the latest announcement from Altera, which is that they've augmented their MAX and MAX II CPLD offerings with a new "zero-power" MAX IIZ CPLD family. This new family is designed specifically to address the power, package, and price constraints of the portable applications market.
Members of the MAX IIZ family are claimed to offer minimal power consumption. In the case of a device fully loaded with 16-bit counters and clocked at 50 MHz, for example, the dynamic power consumption is only 8.9 mA. Meanwhile, the device's static power consumption is a measly 29 µA.
MAX IIZ devices are available in densities of 240 and 570 logic elements (LEs). The devices are available in ultra-small MBGA packages (some as small as 5 mm × 5 mm) with up to 160 I/Os. This increased logic density and greater I/O count allows greater integration of existing functions from other devices, substantially reducing board space and power consumption while lowering overall system costs.
These devices can be used to implement a wide variety of tasks, including voltage level shifters, GPIO expanders, bridging functions, peripheral control functions, complex interface functions, and power-saving co-processor functions.
The folks at Altera say that MAX IIZ devices break through the power, space and cost limitations of traditional macrocell-based CPLDs by combining non-volatility and instant-on performance with an innovative look-up table (LUT) logic structure. The devices utilize a 0.18-micron process, 1.8V core voltage, and 6-metal-layer flash to provide both high functionality and zero-power consumption in a single device.
The advanced system features of MAX IIZ CPLDs , such as user flash memory, an internal oscillator, cost optimization, greater density, smaller packages and lower power consumption, are claimed to far surpass those of all traditional macrocell-based CPLDs.
MAX IIZ devices are supported by free Quartus II Web Edition software version 7.2, SP1. The Quartus II software also integrates seamlessly with all leading third-party synthesis and simulation tools. Customers can download the subscription edition and web edition of the Quartus II software at www.altera.com/download.
Pricing and availability
Production-qualified MAX IIZ EPM240Z M68 devices will begin shipping in the first quarter of 2008 at US$1.25 in high volumes. All MAX IIZ devices will be shipping in production by the second quarter of 2008. Also MAX IIZ demo board will be available by the second quarter of 2008.
Additionally, over 20 MAX IIZ design examples, enabling designers to quickly and cost effectively create and customize their designs, are available (Click Here for more information).
Click Here for more information on MAX IIZ devices. Click Here for more information on MAX IIZ devices in portable applications.