Newport Beach, Calif. Jazz Semiconductor has announced enhancements to its advanced bipolar CMOS DMOS (BCD) process platform including the addition of an ultra-low Rds(on) scalable NLDMOS device. The reduction of Rds(on) enables up to a fifty percent shrink in die size in most power devices, said Jazz.
A full line of high-voltage BCD process technologies, ranging from 0.5-micron to 0.18-micron, provide a range of complete solutions from linear regulators to the most advanced digital control point-of -load (POL) regulators. The BCD process platform offers is well-suited for low-leakage power requirements.
The feature set of these process technologies includes: 5-V CMOS, a 1 Kohm poly resistor, MIM capacitors, and a broad voltage range of LDMOS transistors designed to
operate at 12 V or 20 V to 40 V with ultra-low Rds(on) at all voltage levels. Other features include: VIA stacking, thick top power metal (3 microns) for improved current-carrying capacity, ESD protection circuits, and triple well isolation.
The 0.18-micron BCD process adds the combination of high-density 1.8-V digital CMOS with higher voltage drivers required for highly integrated power SOC designs.
A full design kit and modeling support for the BCD process platform is available including support for digital standard cells and analog models for all devices. The design kit also includes a novel scalable model for the LDMOS devices that allows designers to
vary the voltage rating and Rds(on) of the high-voltage LDMOS devices continuously from 20 V to 40 V rather than making use of fixed cells. This provides IC designers with an added tool in optimizing the tradeoff between die area and voltage handling performance to result in the lowest die cost for a wider variety of applications, said Jazz.
Jazz Semiconductor www.jazzsemi.com