Venice, Florida — Cadence Design Systems, Inc. announced an array of new custom IC design capabilities in the Virtuoso® suite of technologies that help chip makers accelerate volume production of large, complex designs, especially at advanced node processes of 65 nanometers and below.
Upgrades to the Cadence Virtuoso custom design platform to be delivered in the latest releases provide tighter manufacturability integration, improved parasitic analysis, and speedier simulation tools for accurate and efficient verification of complex designs. These new features address the current and emerging challenges faced by semiconductor design companies in the development, physical implementation, verification, and manufacturing of complex chips at advanced process nodes.
In September last year Cadence coined the phrase "What you design is what you get," or WYDIWYG, to describe a new approach to advanced-node design that features manufacturing-aware physical implementation and signoff capability that is correlated to foundry signoff. By modeling key manufacturing processes within the implementation flow and optimizing early, overall design time is reduced and designers' confidence is increased that the chip will work as intended.
Process variations and circuit parasitics have more impact at advanced nodes, forcing designers to run multi-day simulations to validate their designs for silicon. The Virtuoso Spectre® Circuit Simulator with new turbo technology targets analog and mixed-signal designs that have extensive parasitics. The new version of the simulator also includes parallelization techniques that accelerate simulations even further on multi-core hardware platforms. When these enhancements are used in the Virtuoso Analog Design Environment GXL, parasitic problems can be detected and overcome early in the design flow, rather than later when corrections are much more expensive.
The new IC 6.1.3 release of the Virtuoso custom design platform is expected to be available in Q308. Cadence also has integrated space-based routing technology with Virtuoso Layout Suite GXL. The new capabilities include enabling concurrent design and manufacturing awareness for yield improvement. Tightly integrated with the Cadence Multi-Mode Simulation technology in the new MMSIM 7.0 release, the upgraded platform aims to provide design centering and yield optimization with boosted local and global performance. In addition, new Cadence Express Pcells technology reduces design manipulation by up to 10 times over traditional methods.
Cadence Provides WYDIWYG Capability, and
Cadence speeds analog and mixed-signal verification