Venice, Florida — Mentor Graphics Corp. announced its high-performance platform to accelerate the verification of PCI Express products. This new platform enables designers to test their complete system, including PCI Express I/O's, as well as employ real-world stimulus early in the development cycle. The platform consists of the Veloce® family of hardware-assisted verification products and the iSolve™ PCI Express product.
Combined with the Veloce product family, the iSolve PCI Express platform delivers a high-performance and easy-to-use system verification solution to develop PCI Express products, without compromising delivery schedules. Key benefits of the solution include:
True PCI Express to PCI Express solution, with direct connection to PCI Express PC through industry-standard PCIe connector ("PCIe out-of-the-box")
Provides a verification solution for root complex, switch, PCI bridge, and endpoint designs
x1, x2, x4, and x8 lane support in one product, including auto-negotiation
Supports PCI Express standards 1.1 and 2.0 (including Gen 2.0 rate switching)
Ready to use with evolving BIOS, drivers, and software stacks for PCI Express
Visibility port features for debug and visibility into the design
The solution is available for deployment at customer sites, effective immediately.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.