Mountain View, Calif.MIPS Technologies Inc. has introduced a 40nm USB PHY IP core and USB-certified 1.8v 45nm USB PHY IP core that enable developers to easily integrate USB functionality into their advanced SoCs for many consumer applications.
According to MIPS, a leading cellular communications chipset provider will be first to go into production with an SoC that integrates MIPS Technologies' silicon-proven 1.8v 45nm PHY.
MIPS Technologies' USB PHY IP cores represent a new generation of USB physical layer architectures using 1.8v or alternatively 2.5v IO devices to deliver low power consumption for 45nm and 40nm SoC designs.
Low power, along with a compact, silicon-saving design, makes these IP cores especially well-suited for leading-edge mobile applications. Advanced programmability allows developers to fine-tune the analog parameters of their system for maximum performance results in silicon.
MIPS Technologies Inc., www.mips.com