SAN FRANCISCOEDA vendor Mentor Graphics Corp. Tuesday (Jan. 20) announced a scalable design methodology based on transaction level modeling (TLM) that, according to the company, allows a single model to be taken from design concept to implementation.
Mentor's Vista family of electronic system level (ESL) design tools are structured to support an efficient "layered" modeling based on the Open SystemC Initiative's recently announced SystemC Transaction-level Modeling Standard (TLM-2.0), the company said.
Mentor (Wilsonville, Ore.) also announced an automated flow between the Catapult C synthesis tool and Vista offering a TLM wrapper generation flow which now supports TLM-2.0 compatible models. The Catapult-Vista TLM-2.0 model generation flow bridges the gap between hardware design and system-level modeling by providing a link between the Catapult C Synthesis tool untimed ANSI C++ source and the Vista SystemC scalable design and simulation environment, according to the company.
"By providing our customers with the Vista 'single-model' Scalable Design Methodology, we hope to encourage wider industry adoption of the TLM-2.0 standard," said Simon Bloch, vice president and general manager of Mentor's design and synthesis division, in a statement.