SAN JOSE, Calif. The USB interface's drive into Gbit territory got another backer Monday (March 9). Gennum Corp. announced an integrated physical layer and controller for USB 3.0 now available for licensing as a silicon block.
The so-called SuperSpeed USB interface, released in November, runs at up to 5 Gbits/s and can deliver as much as 300 Mbytes/second of data at the application layer. To date at least three other companies have demonstrated or announced silicon support for the interface.
Gennum's Snowbush IP group already ships 5 and 6 Gbit/s silicon IP for second-generation PCI Express and Serial ATA physical-layer interfaces that have been used in silicon. Its USB 3.0 controller design has been verified in an FPGA but has not yet gone through a customer tape out.
Synopsys said in November when the USB 3.0 spec was released that it would have PHY, controller and verification IP for USB 3.0 available early this year for select partners. It said the IP would be generally available in the second half of this year.
At the November spec release Symwave demonstrated a working USB 3.0 chip. PLDA Inc. gave a demo at DesignCon in February of its USB 3.0 block running in an FPGA with throughput of about 3.5 Gbits/s.
Given the availability of the silicon blocks, SuperSpeed USB chips are expected to roll late this year and systems using them could emerge in the first half of 2010. With as many as 2.6 billion USB products in the market, one market researcher projected as many as 500 million devices could shift to the 3.0 spec by 2012.
"I don't think the recession will slow early adopters," said Gary Ruggles, director of sales for high-speed serial devices at Gennum's Snowbush group.
The new spec pushes the theoretical maximum physical-layer signaling rate of USB from 480 Mbits/s in a single direction for USB 2.0 to 5 Gbits/s bi-directional in version 3.0. PCs, external hard drives, digital cameras and camcorders are expected to be the first adopters of the spec, aiming at uses such as transferring high definition video and fast data synchronization.
The USB Implementers Forum that developed the spec announced in early March it has set up an interoperability lab to test devices initially using a prototype software stack and test tools. The group aims to evolve the tools based on user feedback until they are ready to become part of a final certification program.
Separately the Snowbush group announced it has released a silicon block for a nine-port PCI Express Gen2 switch. The IP block has been verified in an FPGA and passed a certification program at the PCI Special Interest Group.