SAN FRANCISCOAltera Corp.'s 40-nm Arria II GX FPGAs are achieved compliance with the PCI Express (PCIe) 2.0 specification, the company announced Tuesday (July 29).
The device successfully passed the PCI-SIG Compliance and Interoperability Tests at the PCI-SIG Workshop and is now included on the PCI-SIG Integrators List, Altera (San Jose, Calif.) said. Arria II GX FPGAs achieved compliance for up to x8 lane configurations for PCIe Gen1 end-point applications, the company said
Altera's mid-range Arria II GX FPGAs, which are currently shipping, feature integrated transceivers with data rates up to 3.75 Gbps, and have a hard, configurable PCIe interface embedded within the device, according to Altera.
The device's hard IP block implements PCIe Gen1 (PIPE) PHY-MAC, data link, and transaction layers, according to Altera. This IP block is configurable to meet the requirements to support end-point and root-port applications, and is PCIe 2.0 compliant in x1-, x4- and x8-lane configurations, the company said.
Arria II GX FPGAs are targeted for applications using mainstream protocols such as PCIe and Gigabit Ethernet (GbE). The devices boast up to 16 3.75-Gbps transceivers, 256K logic elements (LEs) and 8.5 Mbits of internal RAM.
The Arria II GX EP2AGX125 device is currently available. Pricing information was not provided. More information about the devices is available on Altera's website.