PARIS EDA and IP company Dolphin Integration SA (Meylan, France) has introduced the Logos standard as an alternative to the traditional memory evaluation process based on compiler outputs.
According to Dolphin Integration, the unpleasant gap between the memory area generated by a compiler and the actual in-SoC area is comprised of several parts, including abutment discrepancies, routing constraints, power supply mesh, possibly power rings, and flexibility of insertion with the appropriate number of metal layers.
The Logos standard, claimed Dolphin Integration, enables "a fast and thorough comparison" of the in-SoC performances of embedded memories. It involves eight memory instances with a variable overall capacity to address various SoC placement methods.
Dolphin Integration specified that with Logos users can notably assess the in-SoC memory area, the abutment and the routability on the top metal of the memory.
Then, the Logos standard aims to strengthen and accelerate the identification process for the best library, while ensuring an accurate evaluation of silicon costs, Dolphin Integration said.