PARIS Synopsys Inc. (Mountain View, Calif.) announced it has expanded its DesignWare Converter IP portfolio for 40nm process technologies.
Synopsys said its DesignWare Data Converter IP portfolio has more than 100 data converter IP solutions comprised of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs) supporting Oversampling, Pipeline, Sigma-Delta, SAR and Current Steering architectures.
Synopsys specified that the DesignWare Dual Pipeline ADCs and DACs support 12-bit resolution and offer up to 200 MSPS sampling rate. They are aimed at broadband wireless communications, wired communications and video applications requiring high dynamic range and low power.
The DesignWare Dual Sigma-Delta ADCs, the company continued, support 12-bit resolution with the ability to process narrow and broadband channels in a power-efficient method. They target cellular communication applications requiring support for multiple generation protocols from 2G up to LTE.
For video applications processing common high-definition TV, standard-definition TV or graphics video formats, the DesignWare Video DACs support up to 12- bit resolution and offer up to 300 MSPS sampling rate, Synopsys claimed.
And, for general purpose measurement applications requiring low sampling rates, the DesignWare SAR ADCs and DACs support up to 12-bit resolution and Sigma-Delta ADCs support up to 14-bit high resolution.
Synopsys said it expects its DesignWare Sigma-Delta ADCs, Current Steering DACs, Video DACs and General Purpose ADCs and DACs in the 40nm process to be available in the first quarter of 2010.
The DesignWare Data Converter IP solutions are currently available in leading foundries and advanced technology processes from 180nm to 65nm, the company specified.