CAMBRIDGE, UK EDA company, Sigasi has announced that its hardware development toolkit HDT Release 1.0 will be available on January 13, 2010, sold, distributed and supported over the internet.
In the mean time, the tool continues to be available for free in the public beta program. Existing beta customers are offered a discount and will be upgraded automatically.
Sigasi HDT (Hardware Development Toolkit) is built upon the widely accepted Eclipse platform and contains an ultra-fast VHDL parser and compiler that runs transparently in the background. As a result, the tool fully understands a design in terms of VHDL concepts.
Sigasi HDT drastically increases the productivity of VHDL designers by helping them to write, review and reuse their designs in an intuitive way.
This technology makes it possible to support a wide range of powerful features such as intelligent navigation to any VHDL object in the design, by selecting it in a hierarchical view. Users can also directly navigate from an object to its declaration.
Instant error reporting gives designers immediate feedback on errors introduced by a modification, the tool offers quickfixes, and it also assist users in completing VHDL constructs based on its knowledge of the design.
Sigasi HDT can make sophisticated code transformations that maintain the behaviour of the design (automated hardware refactoring). It can be used to make code clearer and more reusable, to find bugs, and to add new functionality.
Automated refactorings include intelligent renaming of VHDL objects over the whole design, making all the modifications to add or remove a port in a single action, making all the modifications to add or remove a connection in a single action, and modifying design hierarchy.
"Our public beta program has been very well received", said Hendrik Eeckhaut, Sigasi's CTO.
"We have implemented many new features in response to customer suggestions. Moreover,
we now have a proven internet infrastructure to distribute and support our tool."
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