PARIS Munich-based chipmaker Infineon Technologies AG said it has deployed Synopsys' Galaxy Implementation Platform, including IC Compiler, for the 40nm processor aimed at the X-GOLD 626 multi-million-gate analog and digital system-in-package (SIP).
Infineon specified that it has used Synopsys' Galaxy platform to optimize the chip's multiple functional modes with multi-corner/multi-mode (MCMM) technology, taking advantage of the links between Synopsys' Design Compiler(r) RTL synthesis solution and IC Compiler placement and route capabilities.
By using Synopsys' Galaxy, Infineon said it has met its high-performance, low power and area expectations and taped out the baseband processor for the X-GOLD 626 wireless product ahead of schedule.
"One of the key challenges we had in designing the X-GOLD 626 baseband processor was optimizing the design for highest performance and lowest power, without compromising on robustness and quality," commented Hartmut Hiller, vice president of Design Methodology and Implementation at Infineon Technologies.
Hiller added: "Synopsys' Galaxy platform includes essential advanced low power capabilities which, along with its strength in hierarchical design and concurrent MCMM optimization, were critical to our first-pass silicon success."
The X-GOLD 626 is based on the scalable ARM11 architecture.