PARIS DAC is around the corner, and EVE SA (Palaiseau, France) said it has added Transaction-Level Modeling Standard (TLM)-2.0 support to its ZeBu hardware-assisted verification platforms.
EVE noted that TLM-2.0 support for ZeBu allows the creation of high performance hybrid virtual platforms that combine SystemC and RTL models and bridges the gap between software modeling and hardware implementation.
The company said the TLM-2.0 transactor adapter is compatible with the OSCI TLM-2.0 standard, supporting various targets and initiators, blocking and non-blocking transport interfaces, and the Loosely Timed (LT), Loosely Timed Temporal Decoupled (LTD) and Approximately-Timed (AT) coding styles.
At the system level, EVE explained that users can integrate the TLM-2.0 transactor adapter with Electronic System Level (ESL) virtual platforms, as well as with advanced SystemVerilog hardware verification environments.
At the emulator level, EVE's ZeBu TLM-2.0 transactor adapter is an open architecture that is claimed to enable interoperability with other ZeBu transactors, either from EVE’s transactor catalog or created using ZEMI-3.