PARIS High-level synthesis EDA vendor Forte Design Systems announced that its Cynthesizer SystemC high-level synthesis tool has been validated by TSMC for Reference Flow 11.0 inclusion.
TSMC noted that release 11.0 is the first generation of Reference Flow featuring electronic system level (ESL) design. Forte’s Cynthesizer v4.0 was included in the new flow to support SystemC high level synthesis.
"Joining TSMC’s Reference Flow marks a major milestone for Cynthesizer and for SystemC-based design," commented Sean Dart, Forte’s president and CEO. “With a documented flow and methodology from SystemC to silicon, our mutual customers can be confident they will receive a high-quality implementation while addressing the complex issues of deep sub-micron design.”
Forte explained that Cynthesizer’s advanced algorithms and patented datapath optimization engine create high-quality building blocks tuned to the given TSMC library to minimize area and perform detailed timing analysis, eliminating timing closure problems inherent in typical RTL design processes.