The BittWare ATLANTiS FrameWork (AFW) is an integrated system framework implemented in Altera's Stratix FPGA family.
The company says it has overcome some of the limitations of FPGAs that require that most of the design effort be spent on infrastructure and integration, dampening FPGA productivity and severely hampering the designer's ability to experiment, tweak, and validate their FPGA components.
AFW provides an infrastructure that supports FPGA development at a higher abstraction level, promoting the efficient integration of existing application-specific code, as well as code reuse and portability.
AFW provides reconfigurable FPGA components along with the infrastructure necessary to implement, simulate, synthesize, validate, and deploy a complete FPGA architecture.
Fully validated FPGA physical interfaces for all board-level I/O and communications along with proper timing constraints and I/O configurations are included.
Each component can be monitored and controlled via Altera's open standard Avalon Memory Mapped Interface. Similarly, Altera's open standard Avalon Streaming Interface is used to implement point-to-point data transport between AFW components. A set of reconfigurable fabric components expand the interconnect options for both memory mapped and streaming interfaces.
The ATLANTiS FrameWork includes standard API for communication between a functional component and its sources, sinks, masters, and slaves and streaming data interconnect fabrics such as switching, mux/de-mux, FIFO, data reshaping (bit width, clock rate, etc.) and common adaptors such as VIP streaming data.
It provides memory mapped fabrics such as address decoding and arbitration, interrupt handlers, reset infrastructure, and storage (dual port memory and register banks) and validated physical interfaces with proper timing constraints and I/O configurations as well as SerDes protocols providing validated SerDes components for BittWare hardware.
Utility functions typically used in signal processing such as scale, round, saturate, magnitude estimation, magnitude squared, and min/max and included as are interfacing functions such as initialization, scaling, resize, reshape, and array and simulation and test resources such as scripted simulation control, standard data generators, verification and diagnostic components, and bus functional models (BFM).
AFW is interconnected with BittWorks BittWare I/O (BWIO), a collection of device drivers and utilities which provide AFW component drivers and a standard POSIX-based interface (open, read, write, ioctl, close), portability to multiple different hosts including TS201, embedded FINe/NIOS and PC/LINUX (remote) as well as convenient access to resources on the target board. It provides control over AFW FPGA components and the ability to change code to support alternate hardware, effectively decoupling the I/O logic from the processing logic.