Ambler, Pa. – MEN Micro Inc. has designed its 6U FPGA-based, triple-redundant A602 64-bit VMEbus single board computer (SBC) with a lock-step architecture that keeps software development at a minimum.
With this redundant lock-step system that increases system reliability, the SEU-resistant A602 runs the same set of operations in parallel to ensure that the programming only views the hardware components once. The A602 is well-suited for mission-critical applications in avionics and railway markets.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.