Analog Bits Inc. has introduced a design kit for Phase-Locked Loop (PLL) IP products, supporting the Common Platform 28nm process technology.
Analog Bits said chip designers can then benefit from the "zero core area" PLL on the latest 28nm low-power/high-k metal gate (HKMG) process.
The Common Platform was formed by IBM, Samsung Electronics and GlobalFoundries to accelerate the availability of leading-edge technology to foundry customers. The Alliance features 28nm, 32nm, 45nm, 65-nm and 90-nm process technologies.
The PLL IP solution has been qualified on the Common Platform 32nm process technology. It is expected to be qualified and available on 28nm in the second quarter of 2011.
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