Linear Technology Corp. has introduced the LTC3617, a high efficiency, monolithic synchronous step-down switching regulator, capable of generating a bus termination voltage for DDR/DDR2/DDR3 and future standard memory applications requiring sourcing and sinking of current.
An internal resistor divider sets the VTT DDR termination supply and VTTR reference voltages equal to half the voltage applied to the input, with output current capability of ±6A (sinking/sourcing) at VTT and ±10mA at VTTR. The outputs are capable of operation down to 0.5V. The device operates from an input voltage range of 2.25V to 5.5V and allows switching frequencies as high as 4MHz, allowing for very small externals. This creates a small, compact solution footprint that is preferred for laptop computers and graphics card applications, which need ±6A or less for DDR termination. The internal synchronous top and bottom power switches have an RDS(ON) of 35mOhm and 25mOhm respectively, enabling the LTC3617 to attain efficiencies as high as 93%, eliminating the need for an external catch diode while minimizing external component count and board space.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.