Cadence has just released a bunch of new Verification IP (VIP) for various memories and protocols that they hope will allow their customers to be first to market. Some of those models are being made available even before final ratification of the standard.
The new VIP offering for mobile applications includes the following standards:
• LPDDR3: This low-power version of the pervasive DDR3 memory standard enables customers to meet the high bandwidth and power efficiency requirements of mobile systems.
• MIPI CSI-3: Providing an advanced processor-to-camera sensor interface, MIPI CSI-3 enables mobile devices to deliver the bandwidth required to enable high resolution video and 3D.
• MIPI Low Latency Interface (LLI): This interface cuts mobile device production cost by allowing DRAM memory sharing between multiple chips.
• USB 3.0 On-The-Go (OTG): Providing 10x the performance of the previous USB specification, USB 3.0 OTG allows consumers to rapidly transfer data, such as video and audio content, as well as quickly and effortlessly charge devices.
• Universal Flash Storage (UFS): A common flash storage specification for mobile devices, UFS, a JEDEC standard, is designed to bring higher data transfer speed and increased reliability to flash memory storage.
• eMMC4.5: Designed for secure, yet flexible program code and data storage, eMMC4.5, a JEDEC standard, enables high bandwidth, low pin-count solutions that simplify system design.
• cJTAG: With its support for reduced pin count, power management and simplified multichip debug, cJTAG enables efficient testing of mobile devices, a key requirement for delivering high volume, high quality mobile devices.
The new memory models and protocol VIP will be available this month as part of the Cadence Verification IP Catalog. The catalog features support for over 30 complex protocols and models for over 6,000 memory devices. The offering also provides maximum flexibility to customers by ensuring open support for all third-party simulators and design methodologies including UVM, OVM, and VMM.
Brian Bailey –
keeping you covered
If you found this article to be of interest, visit EDA Designline
where you will find the latest and greatest
design, technology, product, and news articles with regard to all aspects of Electronic
Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for
the EDA Designline weekly newsletter – just Click
to request this newsletter using the Manage Newsletters tab (if you
aren't already a member you'll be asked to register, but it's free and painless so don't let
that stop you [grin]).