Infineon has debuted a 32-bit microcontroller multicore architecture that will serve as the foundation of its next generation MCU family targeted at upcoming automotive powertrain and safety applications. The multicore architecture features up to three processor cores to share the application load, introduces lockstep cores, and contains further enhanced hardware safety mechanisms. A first implementation of the architecture is available to selected customers for architecture exploration and early prototyping.
Performance Based on the existing TriCore™ processor, the new multicore architecture contains up to three TriCore processor cores connected over a crossbar running at the full CPU speed and avoiding hardware contentions. Additionally, the architecture implements multiple program flash modules with independent read interfaces which further support the real-time capability.
Other architecture features include a new timer module which offloads the CPUs, and new analog-to-digital converters including Delta Sigma converters with high accuracy and sampling rate.
The 65 nm embedded flash silicon process technology and the microcontroller architecture are designed to balance increased performance with the need for lower power consumption. Additional low power modes are supported to enable very low standby current consumption.
Safety Infineon’s multicore architecture meets the recently introduced ISO 26262 automotive safety standard. Design, implementation, and documentation are focused for compliance to the highest Automotive Safety Integrity Level (ASIL D) to ensure safety system development efforts are reduced to a minimum.
Two of the three TriCore CPUs feature additional Lockstep cores which can be independently configured. Further implemented safety techniques include, for example, safe internal communication buses, a Bus Monitoring Unit, and both error detection code (EDC) and error correction code (ECC) on all memories. A distributed memory protection system operates on core level, bus level, and on peripheral level. These enhanced encapsulation techniques allow the integration of software with mixed criticality levels from different sources, permitting seamless hosting of multiple applications and operating systems on a unified platform, the company notes.
Security The multicore architecture features a hardware security module (HSM) to meet upcoming security requirements to better protect automotive applications from tampering or potential hacking attacks using hardware-based security technology developed by Infineon.
65 nm embedded flash technology The 65 nm embedded flash technology is designed for highest reliability in the harsh automotive environment. End-of-line programming speed of the embedded flash is up to 20 times faster than in the previous generation of Infineon’s microcontrollers. This is especially important due to the increased amount of embedded flash required by automotive systems.
Development Device is available The first implementation of the multicore architecture, the Development Device, is now available for prototyping to selected customers. Automotive system suppliers can start now to explore the multicore architecture’s features and develop their multicore software implementation. The 65 nm Development Device contains three TriCore CPUs, two of them with lockstep implementation, and 4 MByte of embedded flash.
Next-generation 65 nm eFlash MCU family with multicore architecture This multicore architecture will be used in the next generation 65 nm eFlash microcontroller family AURIX™. The family will be highly scalable with devices of up to 300 MHz in clock frequency and up to 8 MB of embedded flash. The microcontroller family is suitable for applications such as the control of combustion engines, electrical and hybrid vehicles, transmission control units, chassis domains, braking systems, electrical power steering systems, airbags, and advanced driver assistance systems.
First products of the AURIX family are scheduled to be available by mid 2012, with qualification planned in the second half of 2013.
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