When High-Level Synthesis (HLS) was first introduced, it was positioned for synthesis of blocks such as video processing. They required large amounts of algorithmic content requiring hardware pipelines to meet performance requirements. For these types of blocks, it really didn’t matter if you used C, C++ or SystemC. But when this technology became more stable and customers were looking for wider adoption, there was always the issue of – how do you connect these blocks into the rest of the system. That is when the HLS vendors started to adopt SystemC because SystemC enabled the communications protocols to be defined and this in turn made it possible to connect the newly synthesized blocks into the system.
A couple of years ago, I was one of the co-authors of the book “TLM-Driven Design and Verification Methodology” which looked at how an interface could be defined between the algorithmic block and an interface block that would be dissolved during the synthesis process.
At DVCon, Calypto announced a very similar concept along with a library of components, starting with the ARM AXI interface.
Functional verification of the block and a TLM model of the interface can help ensure that the description of the block is correct, but when the block is synthesized, the interface has to be synthesized as well and doing that is a little trickier. However, Calypto believes that they now have what it takes.
I asked Shawn McCloud, VP of marketing for Calypto, if they could optimize across the boundary between the block and the interface. He told me that they do and it remains to be seen if they stumble across any issues with this as they expand the library to include more protocols. Next on their list are AMBA and OCP.
First customer ship is expected in April.Brian Bailey
– keeping you covered
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