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Avery DDR4 and DFI-PHY Verification IP

4/2/2012 03:18 PM EDT
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DrFPGA
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re: Avery DDR4 and DFI-PHY Verification IP
DrFPGA   5/11/2012 7:11:54 PM
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Seems like a very complete library of various memory access patterns needs to be included. Any details on what kind of patterns are available?

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