Cypress Semiconductor Corp. unveiled the PSoC 4 programmable system-on-chip architecture, which combines Cypress’s PSoC analog and digital fabric and CapSense capacitive touch technology with ARM’s power-efficient Cortex-M0 core.
The scalable, cost-efficient architecture delivers PSoC’s trademark flexibility, analog performance and integration, along with access to dozens of free PSoC Components—“virtual chips” represented by icons in Cypress’s PSoC Creator integrated design environment. The new PSoC 4 device class will challenge proprietary 8-bit and 16-bit MCUs, along with other 32-bit devices, Cypress said.
The PSoC 4 architecture enhances Cypress’s patented, industry-leading CapSense capacitive-touch sensing technology by offering significant leadership in noise immunity. In addition to capacitive sensing, PSoC 4 targets field-oriented control (FOC) motor control, temperature sensing, security access, portable medical, and many other applications.
The PSoC 4 architecture offers power leakage of 150 nA while retaining SRAM memory, programmable logic, and the ability to wake up from an interrupt. In stop mode, it consumes 20 nA while maintaining wake-up capability. It has the widest operating voltage range of any Cortex-M0-based device, enabling full analog and digital operation from 1.71V to 5.5V, according to Cypress. The architecture facilitates integrated, high-performance custom signal chains and provides both configurable analog and flexible routing.
PSoC 4 leverages the PSoC Creator integrated design environment. The IDE’s easy-to-use graphical interface enables designers to drag and drop pre-characterized, production-ready analog and digital IP blocks—PSoC Components—into a single PSoC device to create customized, feature-rich, and highly differentiated end products.
Cypress plans to announce the availability of new PSoC 4 families in the first half of 2013.
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