Microsemi Corp. has expanded its Synchronous Ethernet (SyncE) product portfolio with the single-chip, ZL30162 timing card device for mobile infrastructure and packet-based carrier Ethernet networks.
The ZL30162 features four T0 high quality and highly programmable integrated digital phase lock loops (DPLLs), capable of locking up to 11 inputs for applications that require independent transmit and receive timing paths.
The company also introduced the ZL30161 and ZL30163 timing card devices with single and dual DPLLs, respectively. Each of the DPLLs on the ZL30161, ZL30162 and ZL30163 can be configured to perform as numerically controlled oscillators (NCOs) to recover a clock based on packet-based timing protocols such as IEEE1588 that can be used for GSM, WCDMA and LTE applications.
The ZL30162 is based on Microsemi's two stage ClockCenter architecture and supports any rate-to-any rate frequency translation from 1Hz to 750MHz, including GPS 1 pulse per second (pps) input. As a monolithic device, the ZL30162 allows for very flexible input reference switching and output clock configuration with very low power consumption. The four high-precision synthesizers generate output clock frequencies with jitter performance that can directly drive 10G and 40G PHY devices.
Availability and Support
All three products—ZL30161, ZL30162 and ZL30163—are available in volume production quantities now.
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