MIPS Technologies, Inc. has introduced the MIPS32 1074K Coherent Processing System (CPS), a new processor with fully-synthesizable multicore IP and offering the high performance of a custom implementation with an off-the-shelf CPU core. The 1074K CPS is the latest in the evolution of MIPS Technologies’ coherent multiprocessing (CMP) platforms, hitting the top end of MIPS’ performance lineup in a compact area footprint.
Using commercially-available standard cell libraries, memories and EDA design flows, the 1074K CPS approaches production frequencies of 1.5 GHz in 40nm G process. The 1074K CPS is targeted for the next generation of internet-connected multimedia products such as digital televisions, Blu-ray players and set-top boxes (STBs). This platform is also well-suited for home/wireless networking products as well as tablet computers leveraging the popular Android operating system.
The 1074K CPS provides connectivity of up to four superscalar Out-of-Order (OoO) 74K cores plus system components for clock/power gating management, global interrupt control, program/data trace functionality, and optional L2 cache controller—as a complete coherent multicore solution. The company claims that when compared to a single, hyper-threaded Intel Atom CPU in its CE4100 SoC, the 1074K CPS configured in a 3-core implementation fits in a smaller silicon footprint and provides nearly 2.5x the performance as measured by the CoreMark benchmark.
The 1074K CPS provides a highly scalable multicore performance migration path for the MIPS32 24K and 74K core families.
MIPS Technologies offers customers two paths to performance through its CMP products, depending on the specific application. The multi-threaded 1004K CPS provides high performance for applications such as high-end smartphones and advanced set-top boxes where multiple tasks run simultaneously, and real-time response and performance efficiency are key requirements. The new 1074K CPS is targeted for applications such as web-connected DTVs and set-top boxes as well as home/wireless networking, where one or two primary functions in an application require significant performance at low cost.
Since the 1074K CPS is MIPS32-compliant, designers can leverage an extensive base of existing software and tools. The 1074K CPS is supported by tools from CodeSourcery, CriticalBlue and others, including MIPS Technologies’ own development tools and probes, and symmetric multiprocessing (SMP) versions of the Linux operating system.
MIPS will also provide accurate and fast simulation models for the 1074K CPS. SoC developers can leverage 100% cycle accurate models, built with technology from Carbon Design Systems, for verification in SystemC and co-simulation environments. Software developers can also take advantage of fast instruction set simulators, developed in conjunction with Imperas, for use in software development and virtual platforms.
The new 1074K CPS will be generally available in October 2010. Two initial versions of the 1074K CPS will be available: the MIPS32 1074Kc CPS, which provides a coherent processing system using base integer cores, and the MIPS32 1074Kf CPS, which includes a floating point unit (FPU) in each core. For more information, contact firstname.lastname@example.org
or visit www.mips.com