Design Con 2015
Breaking News
Product News

eASIC Nextreme

10/5/2010 05:52 PM EDT
1 Comment
NO RATINGS
More Related Links
View Comments: Newest First | Oldest First | Threaded View
Max The Magnificent
User Rank
Blogger
re: eASIC Nextreme
Max The Magnificent   10/5/2010 6:07:03 PM
NO RATINGS
As we plunge into lower and lower technology nodes, designing regular ASICs becomes harder and harder. The great thing about eASIC's single-via configuration technology is that the interconnect can be pre-characterized, so the delays are very deterministic; also eASIC have already handled the vast majority of signal integrity and similar problems. The result is fast turn around and relatively low NRE for devices that are much faster and consume much less power than regular FPGAs. However there is an overhead, so they don't really reach full ASIC capabilities. I'm guessing 75% of the performance of a regular ASIC and 130% the power consumption (at the same technology node). Does anyone have better figures?

Flash Poll
Like Us on Facebook

Datasheets.com Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
Top Comments of the Week