Breaking News
Product News

Veridae Systems delivers new debug solution for FPGAs, ASICs, and SoCs

11/1/2010 04:49 PM EDT
1 Comment
More Related Links
View Comments: Newest First | Oldest First | Threaded View
Max The Magnificent
User Rank
re: Veridae Systems delivers new debug solution for FPGAs, ASICs, and SoCs
Max The Magnificent   11/1/2010 5:05:00 PM
In some respects this is similar to the virtual logic analyzer technologies that we can already use in FPGA designs -- the difference is having a single technology that spans FPGAs to SoCs, plus the folks at Veridae have come up with some news twists that look to be very interesting... I'm looking forward to chatting with some of their users...

Top Comments of the Week
August Cartoon Caption Winner!
August Cartoon Caption Winner!
"All the King's horses and all the KIng's men gave up on Humpty, so they handed the problem off to Engineering."
Like Us on Facebook Parts Search

185 million searchable parts
(please enter a part number or hit search to begin)
EE Times on Twitter
EE Times Twitter Feed
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.
Flash Poll