Cypress Semiconductor Corp. recently announced new Quad Data Rate™ (QDR™) and double data rate (DDR) SRAMs at 36-Mbit and 18-Mbit densities, the latest members of its 65-nm SRAM family. Cypress reports that its patented process technology reduces power consumption up to 50% compared with 90-nm SRAMs. The SRAMs are well suited for networking applications, including core and edge routers, fixed and modular Ethernet switches, 3G basestations, and secure routers. They also enhance the performance of medical imaging and military signal-processing systems.
Form, fit and function compatible upgrades for 90-nm QDRII/QDRII+ SRAMs
Fully compliant with the QDR Consortium specifications.
On-die termination (ODT), which improves signal integrity, reduces system cost, and saves board space by eliminating external termination resistors.
The 36-Mbit CY712xxKV18 and 18-Mbit CY7C11xxKV18 are available in production quantities today from Cypress and its distribution partners. Each device is available in multiple configurations based on I/O width (x18 or x36), burst length (B4 or B2) and latency (1.5-ns, 2.0-ns or 2.5-ns).
These make great big external memories for FPGAs doing high speed image processing and DSP functions. Even advanced algorithms using sparce matrix functions can benefit. Keep the memory bandwidth coming- there is always a use for an increase...
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.