Carbon Design Systems and MIPS Technologies are collaborating to create and distribute virtual platform models of MIPS Technologies’ processor intellectual property (IP) cores.
The first models are available already from Carbon, the leading supplier of solutions for architectural analysis, performance optimization and pre-silicon firmware debug.
Carbon’s processor models are generated from the production register transfer level (RTL) code for each MIPS core. The resulting models will deliver 100% cycle accuracy.
The models and virtual platforms will feature integration with gdb and the MIPS Navigator ICS (Integrated Component Suite) to enable interactive debug and analysis.
According to Art Swift, vice president of marketing and business development at MIPS, models of MIPS processor IP and corresponding virtual platforms from Carbon are compiled directly from the implementation RTL code and maintain 100% functional accuracy.
He said configuration and generation of the models can be done at any time using Carbon’s IP Exchange web portal. Models are designed for use in Carbon’s SoCDesigner Plus virtual platform and can execute as part of a SystemC or RTL simulation environment.
Carbon Design Systems will demonstrate its architectural analysis, performance optimization and pre-silicon firmware debug tools at the 48th Design Automation Conference (DAC) June 6-8 at the San Diego Convention Center in San Diego, Calif.
To learn more, go to www.carbondesignsystems.com or www.mips.com.
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