I just heard from the folks at Atrenta, providers of SoC Realization solutions for the semiconductor and electronic systems industries, that they are announcing a comprehensive textbook on RTL design. The textbook, Principles of VLSI RTL Design, A Practical Guide, authored by Sanjay Churiwala and Sapan Garg is being published by Springer Science+Business Media.
The book is based on the authors’ experiences while working at Atrenta’s Noida, India R&D center.
“Through our years of work at Atrenta, we had seen a lot of designs and design methodologies. We developed a good understanding of what best practices looked like,” said Sanjay Churiwala. “It was gratifying to be able to put all those ideas down on paper so others can benefit from our experiences.”
The book targets RTL designers and is said to provide rich information on design practices and how they affect downstream implementation tasks. Topics discussed in the text include: reliable RTL construction, clock domain crossings and clock synchronization, design for test and testability, power consumption, static timing analysis, timing exception handling and routing congestion.
“The decisions made by RTL designers can have a profound impact on the schedule and ultimate quality of the chip,” said Sapan Garg. “Through the use of many examples, we highlight how the RTL designer can heavily influence the outcome of any design project.”
Scanning the TOC, it looks like there is indeed a lot of good stuff in here for RTL designers, but unfortunately, the book could've used more rigorous editing. It is written in a conversational style that makes it difficult for reading comprehension (e.g. sentence fragments, missing articles, etc.)
I'm not trying to be a grammar nazi or anything, but my brain thinks differently when I read than when I listen, so I found it tedious to read through the first chapter preview on Google books.
I can understand the price as the market for such a book is probably pretty limited, but regardless that is a lot for any book. In my experience, most of the business and technical books that I've purchased to augment my understanding tend to have one or two useful chapters. If the book costs $30, I can stomach that. Not at $129 though.
I think the challenge is finding (or writing, if you're the author) a text that fits the right spot between being an overview for people new to the subject and Phd level detail.
Speaking of this book specifically, I read the first few pages that Amazon will display and found it to be fascinating. I know nothing about RTL (or VHDL / HDL either) but have been interested in those subjects for a while. Based on the introduction, I'd buy it for $30 just to explore the subject area, but not for $129. On the other hand, if that was my profession and I needed a refresher or more knowledge of RTL specifically, then the $129 would likely seem like a bargain.
Trust me, $129 is a lot of money to me too... the first thing I do when I go to Barnes and Noble is to peruse all of the bargain books in the hope of getting a good deal :-)
But as you say, it all depends on how good the book is -- if it makes you into a much better designer, then $129 is cheap compared to the ultimate pay-back...
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.