Analog Devices, Inc. (ADI) announced the ADIsimRF™ design tool which allows engineers to model RF signal chains using devices from ADI’s RF IC portfolio. The ADIsimRF Rev. 1.5 enhancements include more visibility into signal levels within the signal chain, the ability to set RMS and peak-power warning thresholds, and calculators for measuring inter-stage power loss. ADIsimPLL™ Version 3.4 development software has been upgraded to support new products in ADI’s PLL portfolio, specifically the ADF4351 PLL for base station and general-purpose applications and the ADRF6850 integrated broadband receiver for satellite applications. The new versions of these design tools are available from ADI’s web site for free.
The ADIsimRF design tool provides calculations for the most important parameters within an RF signal chain, including cascaded gain, noise figure, IP3, P1dB, and total power consumption. The ADIsimRF tool also contains embedded data from many of ADI’s RF ICs
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.