The good news is that emulation is a growing segment of the EDA industry. The reason for this is clear. Simulation just cannot keep up with verification needs, except at the block level. When subsystems are integrated or complete chips need to be put through their paces, emulation or rapid prototyping has become a necessity. Smaller designs got away without emulation in the past, but more companies are hitting the threshold when emulation becomes a necessity rather than a luxury.
Emulators are one of the biggest investments that EDA companies make. Software tools are generally cheap to prototype, release, manufacture and maintenance is a negotiated part of the product costs. But emulation is different, especially when they contain custom chips. Today Mentor has announced a next generation for their emulators with a new chip at its heart.
Veloce2 can accommodate up to two billion gates, enough for most designs and can do that will full visibility. What’s more, with most chips these days containing processors and with software providing an important element of functionality, an emulator can provide a better environment than real life. You can fully debug the hardware and software without it being destructive to the system – a problem with most software development platforms.
The new platform is fully compatible with existing software. In fact Mentor will continue to enhance the software and it will run with all installed legacy systems so long as the software does not require a capability only found I the new boxes. Also, there is no need to worry about being the first on the block to have to try out the new hardware. Mentor has been quietly shipping these new boxes since last October, so they are fully stable.
Veloce2 is built upon the totally new, full custom emulation IC, Crystal2, developed from the ground up by Mentor. The benefits of the custom design include fast compile, full debug visibility, and advanced memory modeling.
Another new capability being released is VirtuaLAB. This replaces the need for costly and unreliable bench top environment when things such as peripherals are required. Traditionally, wires had to be run from the emulator to speed bridges and those in turn connected either in-circuit or to signal generators and protocol analyzers. Not anymore.
By integrating RTL models of key peripherals like USB, Ethernet, PCIe and the like, the Veloce VirtuaLAB is able to create a full target environment that allows developers to validate both the hardware and embedded software, before any hardware is manufactured. Because VirtuaLAB is entirely software-based, it is easily replicated to support multiple software and hardware developers simultaneously.
Wondering what one of these beats will set you back? Mentor’s rule of thumb is that it is 1p per gate per year with a 3 year support contract. The smallest box is for 15M gates although Mentor says that 50M is probably the low end threshold for making customers want to use an emulator.
Brian Bailey – keeping you covered
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