The folks from MathWorks tell me that the guys and gals at FLIR Systems used MATLAB and HDL Coder to reduce thermal imaging FPGA development time from concept to field-testable prototype by 60%.
By using MATLAB to design, simulate, and evaluate algorithms, and HDL Coder to rapidly implement the best algorithms on FPGAs, FLIR was able to speed development, complete enhancements in hours instead of weeks, and reuse code for prototyping and production.
With MATLAB and HDL Coder, FLIR’s algorithm engineers produce FPGA prototypes themselves instead of handing written specifications to hardware engineers, who may not have full knowledge of the algorithm. This new thermal imaging algorithm development workflow also eliminates the error-prone step of translating algorithms to HDL by hand, adding time for developers to try more design iterations. As a result, FLIR algorithm engineers are able to explore a variety of design variations, gain confidence in the final prototype, and reuse code for production.
“With MATLAB and HDL Coder we are much more responsive to marketplace needs. We now embrace change, because we can take a new idea to a real-time-capable hardware prototype in just a few weeks. There is more joy in engineering, so we’ve increased job satisfaction as well as customer satisfaction,”
said Nicholas Hogasten, image processing technology manager, FLIR Systems.
“To quickly and accurately develop FPGAs, algorithm engineers need an environment that facilitates iterative design from concept to implementation,”
said Sudhir Sharma, HDL technical marketing manager, MathWorks. “Now, with HDL Coder, these engineers can prototype and verify their MATLAB and Simulink algorithms on FPGAs with the ease of a push button workflow.”
For more details on FLIR Systems’ use of MATLAB and HDL Coder, see the story FLIR Accelerates Development of Thermal Imaging FPGA
If you found this article to be of interest, visit Programmable Logic Designline
where – in addition to my Max's Cool Beans
blogs – you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here
to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).