The folks at Xilinx have just announced their fourth-generation secure architecture with Information Assurance and Anti-Tamper IP core support for defense-grade All Programmable 7 series FPGAs and Zynq-7000 All Programmable SoCs.
Sad to relate, this announcement was originally intended to make a big splash at MILCOM 2012 (Booth #731), which was scheduled to be held in Orlando, October 31- November 1, 2012. However, I just heard that Hurracane Sandy caused the organizers to cancel this event.
Of course this doesn’t take anything away from the Xilinx announcement. These unique high reliability, defense-grade devices reduce the risk and cost of deploying the latest Aerospace and Defense (A&D) systems by utilizing off-the-shelf reprogrammable Xilinx FPGAs and SoCs.
Manufactured with state-of-the-art 28nm process technology, all devices are optimized for high performance and the lowest total power. Xilinx defense-grade products are fully pin-compatible to commercial-grade equivalents for low cost prototyping and are offered off-the-shelf.
Xilinx’s more than 20-year legacy working with both government and major defense contractors, combined with Xilinx’s fourth generation secure silicon, Information Assurance methodology and DoD 5000 Series compliant Anti-Tamper Security Monitor IP core (SECMON), forms the basis for Xilinx’s ‘fail safe heritage’. This fail safe heritage removes any single point of failure in systems that may compromise a mission, a key attribute in assuring secure applications functionality.
“Xilinx is the only major FPGA vendor offering a distinct defense-grade product line with fail safe heritage,” said Yousef Khalilollahi, senior director, Aerospace and Defense at Xilinx. “In addition to the secure capabilities, the defense-grade All Programmable 7 series FPGAs and Zynq-7000 SoCs offer mask set control, ruggedized packaging with fully-leaded (Pb) content for harsh environmental operation, full extended temperature range testing, long term availability and anti-counterfeiting features.”
Extensive testing and experience from previous generations of devices has resulted in Xilinx’s latest defense-grade offering to provide the lowest cost, lowest power and most flexible solution to developers who need to meet the demanding requirements of a variety of applications in military communications, avionics, electronic warfare (EW), Intelligence Surveillance Reconnaissance (ISR) systems and missiles and munitions.
An example of a defense-grade application for the Xilinx 7 series FPGAs and Zynq-7000 All Programmable SoCs for secure communications solutions is a device with Single-chip cryptography (SCC) capability with Security Monitor 3.0 IP core for physical design security. SCC combines the functionality of multiple FPGAs into a single device, enabling A&D product developers to reduce SWaP-C of systems through higher levels of integration. Additionally, the inherent reprogrammability of these devices overcome the limitations of traditional long lead- time ASIC and ASSP approaches by allowing multiple capabilities that have the same hardware configuration. These devices specifically address the demands of modern portable wireless A&D systems that must run on battery power while being absolutely secure.All Programmable FPGAs, SoCs and Tools
System designers are empowered to maximize system performance, lower power, preserve design flexibility, provide superior programmable systems integration and reduce BOM costs with Xilinx’s All Programmable, production-available defense-grade FPGAs and SoCs, including Virtex, Kintex, and Artix FPGA families and the Zynq-7000 All Programmable SoCs.
Delivering unchallenged industry leadership in logic, memory, and DSP capacity, 7 series FPGAs with DSP capabilities combine massive DSP processing bandwidth and low power with easy-to-use design flows to insure designs are delivered on-time and on-spec, while providing peak performance, the highest performance DSP at any price to price-optimized performance for volume applications at the right price. And with FPGA co-processing, traditional DSP device acceleration is given an unparalleled performance boost.
System designers can realize a major breakthrough in SoC-level integration with the All Programmable Zynq-7000 devices and gain ASIC levels of performance and power consumption with the flexibility of an FPGA and ease of programming of a microprocessor.
With the Vivado Design Suite
, Vivado High-Level Synthesis (HLS) accelerates design implementation by enabling C, C++ and SystemC specifications to be directly targeted into Xilinx All Programmable FPGAs, SoCs and 3D ICs without the need to manually create RTL. Advanced algorithms used today in A&D applications, as well as a wide variety of other market applications, are more sophisticated than ever before. Vivado HLS provides system and design architects with a faster and more robust way of delivering quality designs.
The Xilinx All Programmable families of defense-grade FPGAs and SoCs are available in I-temperature (-40° to +100°C), Q-temperature (-40° to +125°C) and M-temperature (-55° to +125°C). The devices will be in production Q1 of 2013. Click Here
for more information.
If you found this article to be of interest, visit Programmable Logic Designline
where – in addition to my Max's Cool Beans
blogs – you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for my weekly newsletter – just Click Here
to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).