I just heard from my chum Mike Santarini at Xilinx. Mike is the publisher of Xcell Journal, but that's not what he wanted to talk about this time. Instead, Mike told me that he was chatting with one of his buddies at Xilinx a couple of months ago, and his friend mentioned that he and one of his co-workers had just finished writing a book.
This tome is intended to teach software engineers how to use the high-level synthesis (HLS) tool in Vivado. That's right! This book is targeted at the software guys and gals, although any hardware "cats" who are not familiar with this ESL (electronic system level) methodology can learn from it too.
Co-authored by Xilinx's Fernando Martinez Vallina and Igor Kostarnov, this user guide is based on the training Xilinx has successfully deployed at tier-one customers, enabling their software engineers to migrate software algorithms from processors to Xilinx All Programmable FPGAs and SoCs. As Fernando told me:
This user guide was created after interactions with multiple customers who were transitioning their DSP algorithmic code to an FPGA using the Xilinx Vivado High-Level Synthesis tool (HLS).
As a result of these interactions, it became clear that although Xilinx FPGAs provide compelling advantages over other computing alternatives, preconceptions about the programming model made it difficult for engineering managers, system architects, and software engineers to visualize the use of an FPGA for their specific algorithm.
This user guide is a result of training materials and information created for DSP programmers and engineering executives who were looking for a way to accelerate their applications while at the same time reducing development times, cost, and power consumption. This guide condenses all of that material into a single document that has the following purposes:
- Demystify FPGA hardware design concepts
- Provide the level of hardware design insight needed to effectively use Vivado HLS
- Explain how using HLS to compile an algorithm into an FPGA is not all that different from optimizing and compiling for a DSP
- Provide an overview of the kinds of applications that are suitable for FPGA implementation with HLS
- Provide the reader for an understanding of the overall design flow from application to design running on the FPGA
To make a long story short, Xilinx decided to publish this comprehensive 89-page document as a Free Users Guide (UG998) Introduction to FPGA Design with Vivado High-Level Synthesis. I must admit that the "UG988" moniker originally gave me pause for thought, so I asked Mike about this and he replied (in a way that made me think he was "speaking" very slowly): "UG stands for User Guide, and the number of this particular user guide is 988." Well, there's no need to be snooty about it (LOL).
Now, I'm all in favor of free manuals and user guides, especially when -- like this -- they are written by folks who know what they are talking about. Furthermore, I understand that you gain access to HLS when you sign up for a Free 30-day Vivado Design Suite: System Edition Evaluation License (click here for more details).
Have you read this manual yet? If so, please post a comment below telling us what you think about it.