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Graphene Minds Bandgap With Non-Boolean Logic
R. Colin Johnson
9/5/2013 04:00 PM EDT   5 comments

PORTLAND, Ore. — Graphene is touted as the miracle material that will extend the semiconductor roadmap beyond the silicon era, but its lack of a bandgap has seriously crippled progress. Instead of modifying graphene to create a bandgap, and in the process lowering its high electron mobility, researchers at the University of California in Riverside (UCR) propose adopting the kind of non-Boolean logic that graphene naturally exhibits.

UCR professor Alexander Balandin told EE Times:

    Graphene devices, when biased as we propose, reveal negative differential resistance -- NDR -- an effect that has its roots in graphene's symmetric band structure. These non-linear NDR current-voltage characteristics can be used in order to obtain bi-stable or bi-valued outputs.

    This means that for some input values you will get two output values -- unlike in conventional logic where you have single-valued outputs -- and these bi-valued regions can be used for constructing a non-Boolean logic in circuits with very high mobility and very high electron saturation velocity, which makes these circuits very fast.

    The main idea is to make use of the bi-stable outputs provided by each stage and to build a multi-valued logic unit.

Scanning electron microscopy (SEM) image of novel graphene device implementing non-Boolean logic (with UCR logo etched in graphene at top). Scale bar is one micron.
(Source: University of California at Riverside)
Scanning electron microscopy (SEM) image of novel graphene device implementing non-Boolean logic (with UCR logo etched in graphene at top).
Scale bar is one micron.
(Source: University of California at Riverside)

According to Balandin and his collaborators, UCR professors Roger Lake and Alexander Khitun, these super-fast non-Boolean logic circuits can be implemented with graphene field-effect transistors connected to harness NDR in circuits that are particularly well suited for many data-processing tasks, such as image recognition, data encryption, and database search.

"The observation of the NDR in the graphene double-gate transistors opens a new horizon for building special analog logic circuits, which can solve some special problems more efficiently than the conventional digital processors," professor Khitun told us.

Guanxiong Liu, who built the graphene transistors in Balandin's lab, and Sonia Ahsan, who simulated the devices using atomic-scale models while working under Lake, both earned their doctorates at UCR while contributing to this research. Read all the details in this free download of their paper.

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Re: Power?
GroovyGeek   9/7/2013 3:54:56 PM
Practically all desirable ELECTRONIC properties of graphene disappear when scaled deeply. Mobility drops below Si, techniques for surface passivation and contacting are non existent. Let's remember that the much ballyhooed properties are for um-wide suspended ribbons of exfoliated graphene. CVD deposited materials are a long long way off from even approaching the record setting performance of exfoliated materials. Nevertheless the "wake me up when you are ready for TSMC" attitude is really short sighted. The problem with graphene is that people bend over backwards trying to make it look like Si (witness BisFET and other related proposals). The intriguing aspects of this work are that it demonstrates a creative use of graphene's unique properties.

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seaEE   9/7/2013 12:59:44 AM
I guess I need to learn about nonboolean logic and I don't. :)

rick merritt
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Re: Power?
rick merritt   9/6/2013 9:50:45 PM
As I said before, we are going to need some CMOS alternatives soon. Keep cranking guys...and wake me up when you are ready for TSMC!

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Re: Power?
R_Colin_Johnson   9/6/2013 12:29:41 PM
Of course, the power, size, etc. will go down as these non-Boolean circuits are optimized. You can get all the details of the current state of their research at:

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selinz   9/6/2013 11:36:18 AM
It sounds like these devices would use a fair amount of power to maintain a state... True?

Also, those structures are huge. Does all of this scale down to where CMOS is today?

EE Times Senior Technical Editor Martin Rowe will interview EMC engineer Kenneth Wyatt.
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