This is a roundup of news and activities associated with EDA and IP over the past couple of weeks. It covers a longer period than normal due to my absence while on vacation.
Memoir Systems has released Renaissance 10X, a new family of multiport memory IP cores that increases memory performance by a factor of ten. Renaissance 10X can generate memories with various read/write combinations for up to ten non-blocking active ports, to achieve up to 10 billion memory operations per second (MOPS) in a 28 nm process.
North America-based manufacturers of semiconductor equipment posted $1.27 billion in orders worldwide in July 2013 (three-month average basis) and a book-to-bill ratio of 1.00, according to the July EMDS Book-to-Bill Report published today by SEMI. The three-month average of worldwide bookings in July 2013 was $1.27 billion. The bookings figure is 4.6 percent lower than the final June 2013 level of $1.33 billion, and is 3.1 percent higher than the July 2012 order level of $1.23 billion.
Imagination Technologies announced an expansion of its partnership with Mentor Graphics for Sourcery CodeBench development-tools components for MIPS CPUs. It provides a C/C++ development environment that includes a GNU compiler and debugger across all major members of the MIPS CPU family, including the upcoming MIPS32 and MIPS64-based Series5 "Warrior" generation of cores. They have also been working together with TSMC to increase performance on Imagination's PowerVR GPUs. Initial efforts have achieved 25 percent overall performance improvement for the PowerVR Series6 GPU core, with key blocks demonstrating as much as 30 percent improvement compared to existing design flows.
Altium has announced Solidworks modeler for Altium Designer. The new app by ECAD/MCAD collaboration experts Desktop EDA is the result of Altium's first add-on app development partnership. Altium is currently working with other developers to bring additional apps to electronic designers and is targeting a wider release of the distribution and licensing system later this year.
IMEC is collaborating with Veeco Instruments on a project designed to lower the cost of producing GaN-on-Si-based power devices and LEDs. This technology can be used to create cost-effective LEDs that enable solid-state lighting; more efficient power devices for applications, such as power supplies and adapters; PV inverters for solar panels; and power conversion for electric vehicles.
Mentor Graphics has announced that Advanced Wireless Semiconductor Company has selected the Calibre nmDRC and nmLVS products as their golden signoff physical-verification solution for GaAs ICs targeted for mobile and other wireless applications. As part of their foundry offering, AWSC will provide the Calibre design rule decks to its customers to help them ensure their designs are error free and meet all foundry requirements before they submit them to AWSC manufacturing.
Semiconductor Manufacturing International Corp. (SMIC) has adopted the Cadence digital tool flow for the new SMIC Reference Flow 5.1. Cadence tools used in the flow are RTL Compiler, Encounter Digital Implementation System, Encounter Conformal Low Power, Cadence QRC Extraction, Tempus Timing Signoff Solution, Encounter Power System, Physical Verification System, and Cadence CMP Predictor.
Imagination Technologies introduced FlowAudio, a licensable cloud-based music and radio service. FlowAudio is a platform for delivering audio and creating interaction between chips and devices enabled by Imagination's IP, streaming Apps, and cloud based services. They also announced Caskeid, a synchronized wireless multiroom connected audio streaming technology. Caskeid enables any compatible audio device to stream music to Caskeid-enabled audio components or media servers over standard domestic Wi-Fi networks with low-latency synchronization.
Agilent Technologies has released three new solutions for advanced protocol analysis of devices using NVM Express (Non-Volatile Memory Express) storage technology. The analysis tools are options for use with Agilent's U4301A PCIe protocol analyzer and U4305 PCIe exerciser. They include: a transactional decoder, a performance-analysis package, and an NVMe emulator.
Cadence has verification IP (VIP) supporting the new HDMI 2.0 specification. This VIP enables designers to verify that their SoCs conform to the HDMI 2.0 specification. The Cadence VIP for HDMI 2.0 supports all major logic simulators, verification languages, and methodologies, including the Universal Verification Methodology (UVM).
Cadence has introduced the Palladium XP II Verification Computing Platform as part of an enhanced System Development Suite. According to Cadence, it boosts verification performance by up to 50 percent and extends capacity to 2.3 billion gates. Cadence has also added support for eight new mobile and consumer protocols for simulation acceleration.
Xilinx has announced the All Programmable Abstractions initiative. Xilinx and its ecosystem Alliance members including MathWorks and National Instruments now support a combination of software, model, platform, and IP-based design environments. These environments enable high-level graphical and text-based programming languages such as C, C++, SystemC, and will soon support OpenCL™ (Open Computing Language) with automation technology that translates these languages into optimized implementations.
Zuken has announced a new product for electrical design that identifies errors at the development stage and avoids costly iterations. E3.eCheck, part of Zuken's E3. series, automatically ensures the schematic is functionally accurate and that wires and fuses are within the acceptable tolerances. The design analysis runs in real-time and replaces time-consuming manual checks.