Cisco made undisclosed extensions to the Tensilica instruction set. None of them address virtualization, something already supported in server processors and a hot topic in networking.
"We looked closely at that and concluded we did not need it," Jayaram said.
The nPower also marks a new level of design reuse for Cisco, which intends to roll variants of the chip with faster speeds and different feature sets. "Cisco is becoming a lot more thoughtful in creating unified architectures across product families, deliberately intended to serve broad sets of platforms," Jayaram said.
The chip follows the lineage of Cisco's CRS-1 ASIC that emerged about a decade ago. Cisco followed up with another three or more generations leading to the nPower.
Cisco did not disclose several details of the chip including its clock rate and power consumption, presumably because the numbers might seem unflattering.
"I have to say the [disclosed] stats are a little underwhelming actually, it doesn't sound like that big an upgrade from the prior generation design," said Bob Wheeler, a communications analyst at The Linley Group (Mountain View, Calif.).
Technically, a 400 Gbit/s router should be able to handle 600 million packets/second, not the 300M packets/s Cisco claims for the nPower, Wheeler said.
Alcatel-Lucent announced the first 400G router ASIC -- a two-chip set -- in June 2011. It shipped last year in routers with dual 100G channels. Merchant supplier EZChip is now sampling its NP5, another 400G router chip, Wheeler added. Huawei recently began selling a 400G router, said another market watcher.
When told the chip is larger than 23mm on a die, Wheeler added, "that's a big honking chip!"
Cisco rolled three models of the NCS core router family.