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Apple A7 First Look From Chipworks

9/27/2013 01:35 PM EDT
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krisi
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CEO
SRAM for finger
krisi   9/28/2013 10:33:15 AM
SRAM used for finger image storage? How would that work? SRAM loses its content without power

Caleb Kraft
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Blogger
Re: Time and Money
Caleb Kraft   9/28/2013 9:53:55 AM
I doubt google will jump in at this level any time soon. they've typically partnered with a hardware vendor for this kind of stuff, like microsoft. I do know they have custom hardware made for their datacenters though. 

Who knows with google, they don't tend to follow a narrow path forward, so they might decide to experiment with SoC development of their own. 

_hm
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CEO
Time and Money
_hm   9/28/2013 8:48:42 AM
How much time (man hours) and how much money is required to develop this type of SoC? This is very sound approach as it keeps secured technology and profit.

Will Google or Microsoft will take this route to develop their own SoC? IBM or AMD can help them.

 

Kinnar
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CEO
Re: fingerprint sensor data
Kinnar   9/28/2013 5:15:08 AM
I am also wondering why at all fingerprinting data needs to be stored inside a processor. It is human fingerprint Or this fingerprint is referencing some other technical term?

Frank Eory
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CEO
Re: Large on-chip RAM
Frank Eory   9/27/2013 6:42:58 PM
I have to agree, storing fingerprint data in SRAM doesn't make sense. L-3 cache is a better guess.

ExEDA
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Freelancer
Re: 256KB L-1 Cache?
ExEDA   9/27/2013 3:59:31 PM
Apple has presented that A7 has 64KB I-Cache and 64KB D-Cache per core. So 64+64 x 2 = 256KB

luting
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CEO
256KB L-1 Cache?
luting   9/27/2013 3:54:22 PM
That doesn't make sense. L-1 Cache latency is critical and large SRAM has performance issue. Typical L-1 Cache is 32KB. 256KB is too big to me.

luting
User Rank
CEO
Large on-chip RAM
luting   9/27/2013 3:52:09 PM
It makes more sense to me this large on-chip RAM is L-3 Cache for DRAM controller directly next to it. If I am Apple, I will never store direct finger print data in anywhere. Because wherever you store, people will figure out. A good choice is to apply special imaging hashing function to it and only store hashing value. Not sure this technology exist today.

ExEDA
User Rank
Freelancer
A7 Chip large SRAM array and the CPU complex
ExEDA   9/27/2013 3:41:29 PM
Looking at the layout, Apple appears to have used 1 DDR channel to feed the CPU and another channel for GPU data. The large SRAM above the GPU appears to be the embedded cache for graphics memory, which is similar to approach used by Intel's IRIS Pro and XBOX One

To store finger print data? You need to use NVM, not SRAM or you have to keep feeding power to the chip, which is not possible


Also for the CPU highlighted by chipworks, it appears that the complex includes 2 memory controllers from layout, so the actual area for the CPU complex (excluding the memory controller) is likely smaller than 17% or ~17 sq mm

 

ykc0
User Rank
Rookie
fingerprint sensor data
ykc0   9/27/2013 2:51:48 PM
Using SRAM to store fingerprint data? Reference data or scanned input? I would have expected a secure NVM. SRAM is volatile...

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