SAN JOSE, Calif. — Startup ChaoLogix Inc. has retargeted its core technology for use in security and low-power chips, announced its first product, and signed its first customer. ChaoSecure is an IP library that helps mask a chip's power signature to prevent a class of security attacks.
An unnamed security chip vendor signed an agreement in principle to use the first-generation ChaoSecure library for 180 nm devices. A large smartcard maker is working with the startup on a second-generation offering based on a 65 nm prototype chip being made at Globalfoundries.
ChaoLogix, of Gainesville, Fla., was founded by a University of Florida professor who used nonlinear algorithms based on brain patterns to develop stochastic resonance technology. It initially targeted a range of medtech uses.
A new management team refocused the technology on security and low power uses. In September it landed a series C funding round of $4.5 million from local investors on the strength of its working 180 nm prototype.
ChaoSecure makes the power field around a chip look the same no matter what data the device is processing. It thwarts attacks that measure a chip's EMI and perform statistical analysis to determine an encrypted key. It also resists attempts to examine security chips by injecting a faulty voltage signal.
The product is implemented in a standard cell library for building cryptographic blocks and requires no special EDA tools. The company is doubling its five-person engineering team to craft versions of the library for different process nodes.
The startup also is re-purposing its technology for a second product line that enables low-power analog blocks. The first prototype of the low-power offering could be tested by the end of the year.
— Rick Merritt, Silicon Valley Bureau Chief, EE Times