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Altera's FPGA DSP Goes Hardcore

4/22/2014 02:44 PM EDT
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Sanjib.A
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Compatibility to the older development tool
Sanjib.A   4/22/2014 11:38:18 PM
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@Max: Thank you for the information! The DSP blocks are not supported on Cyclone V SoCs I suppose? Are these new devices supported on the Quartus II design tool? Does the older versions of the tool support these new SoCs or it would be required to move to a newer version?

betajet
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Two questions
betajet   4/22/2014 10:00:11 PM
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Two questions:

1.  How much do these puppies cost?

2.  How much power does one of these consume running 1.5 TFLOPS, including the logic needed to get operands to the FPUs?

Also, I sure hope the developers remember to write their floating-point models using single precision, or they're going to get a nasty surprise when they discover that floating-point numbers are not real numbers.

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