Analog EDA startup Thalia Design Automation Ltd., founded by a former CAD engineering manager for Micrel, has raised $1 million in a mix of equity funding and grant support. The Series A funding round was led by Mercia Fund Management and Finance Wales.
Thalia is developing EDA tools that use behavior algorithms from nature for the rapid optimization of analog and mixed-signal performance and power consumption. The money raised will be used to expand Thalia's headquarters in Cwmbran, Wales, and in Bangalore, India, and to support initial customer engagements for the company's tools.
The company was founded in 2011 by Sowmyan Rajagopalan, who serves as CEO and CTO. Rajagopalan had previously worked as CAD engineering manager for Micrel Inc. in San Jose, Calif., according to his LinkedIn entry. Rodger Sykes, a UK semiconductor industry veteran serves the company as chairman. He tells us the company has developed the Amalia analog circuit design optimizer and the Emera power device design optimizer:
Thalia has taken a number of algorithms from nature -- such as methods used by ants and bees to search for food -- and applied them to optimizing design results. The power tool works alongside layout tools and so works at the physical level to minimize size and power. The analog tool works at the variable component and functional level and can home in on an optimum solution much faster than traditional approaches.
Rajagopalan said in a company statement:
Analogue design methodology has remained unchanged for a long time. I have seen the technical and time consuming efforts analogue designers have had to live with in order to design and optimise their circuits. Thalia’s tools will enable users to meet more challenging design requirements within shorter time frames. Custom chip design companies will benefit from reduced design times, shortened redesign cycles, better performing parts and more effective use of scarce skilled design resource.
The AI methods used by Thalia involve considering millions of combinations of multiple component parameters to select the combination that gives the best circuit performance. Optimizations that typically took several days to weeks to complete can now be performed in a matter of hours, the company says. The tools can be used to support the retargeting of existing designs to alternative silicon foundries for cost reduction and sourcing flexibility.