The TSV (orange) connects the bumps on the bottom of the chip stack to the redistribution layer (RDL) at the top of the chip which connects to the next chip with micro-bumps.
(Source: Applied Materials)
That's really a great news and fact figure, and the volumetric production and the huge demand of memory is actually in strict demand of such technology and yes it is really a very good news that people are working hard to make this idea usable in volumetric productions of ICs.
how many of those 30 customers for this AMAT tool are using it for TSVs
I assumed that all 30 are using Ventura for TSVs, but I just checked with Applied Materials to make sure my memory served me well, and they confirmed that Applied Materials has "sent 30 chambers to multiple customers. And yes, Ventura was developed specifically for fabricating TSVs."
Thank you very much for your query. Its good to make sure that all our published facts are checked and verified. Thanks again.
You are right; this is actually a incremental development or stepping stone for the high volume production of 3D Chips. This kind of incremental developments are really required in increasing manufacturability of 3D Chips.
While I agree that AMAT's HVM tool for PVD of barrier and seed layers is exciting news, lets not get ahead of ourselves by making false claims in the title just to get the click-throughs. TSVs will go into HVM when the volume orders start rolling in from customers. A more accurate title would be "HVM PVD Tool Enables Industry to Manufacture 3D IC Stacks in High Volume."