PORTLAND, Ore. -- Spintronic devices that store information on state variables of electrons (not their cumulative charge) could be the answer to the increasing power dissipation of chips as their dimensions are scaled down. Spintronics also could solve the memory refreshing problem that bogs down computers on startup.
"There are two primary reasons for going to spintronics," Ian Young, a senior fellow at Intel Corp. in Hillsboro, Ore., told us. "The first is they require much less energy to switch, giving them a power advantage. And the other is that they are nonvolatile, since you can turn off the power supply and still retain their spin."
Electron spin is a state variable referring to the physical representation of information. In field-effect devices, the absence or presence of charge
is the state variable.
(Source: Intel and Georgia Tech)
The world's first Simulation Program with Integrated Circuit Emphasis (SPICE) platform for modeling these spintronics devices and interconnects was recently invented by Georgia Tech in collaboration with Intel. The project, supported through the Semiconductor Research Corp. (SRC), will give Intel and other SRC members a leg up on designing spintronic devices and interconnects.
"When you talk about spin, it is a vector," said professor Azad Naeemi at Georgia Tech.
But in electrical circuits, we only deal with voltages and currents and similar parameters. So we needed to represent spin in a very different way. What we have created are simple models based on R-L-C [resistors, inductors, and capacitors], very familiar components that everyone uses in circuit design. We use these components to represent the entire physics of these spintronic interconnects and devices, and therefore you can completely model both a systems spintronic and electronic circuits in same SPICE simulation, thereby giving designers a lot of insight because they know how these components behave.
Intel's primary interest in the project is to define the next-generation interconnect for spintronics devices. Today most of the power dissipated in a complementary metal oxide semiconductor (CMOS) is not in the chip itself, but in the interconnections among them. In order to reap the benefits of lower power dissipation in spintronics devices, the interconnect must be rethought, too. Now with the platform developed at Georgia Tech in collaboration with Intel, engineers have exactly the tool they need to accomplish it.
Spin diffusion in a non-magnetic channel represented by physics (left) differential equations and by R-L-C components
that can be simulated by SPICE (right).
(Source: Intel and Georgia Tech)
"There's research going on in spintronic devices -- finding the next logic switch -- but little attention has been paid to the interconnecting between those devices," Young said.
The uniqueness of this research is that it is putting something out there modeling wise to enable an understanding of the implications that interconnects will have on logic implemented with spin. If spintronics devices were used with electrical interconnects, then you would have to convert from spin to charge, which requires a transducer, then back to spin again. So we would like to stay in the spin state as much as possible -- so we need to understand the delay and the energy of a spin interconnect."
The spintronic platform created by Georgia Tech and Intel can provide compact SPICE models for copper or aluminum interconnects. The main factors involved are the length of the wires (for long interconnects, you have to use repeaters), the cross-sectional dimensions, and the resistivity, which increases as the wires are made smaller.
Scattering at wire surfaces and grain boundaries also must be considered, since they become dominant at nanoscale dimensions. The platform includes compact models for nano magnetic dynamics, electronic and spintronic transport through magnet to non-magnet interfaces, electrical currents, and spin diffusion.
— R. Colin Johnson, Advanced Technology Editor, EE Times