Sony Corp. has said it plans to invest 35 billion yen (about $340 million) to increase its production of stacked CMOS image sensors in support of demand for them in smartphones and tablet computers. Of the budgeted amount, Sony said it plans to spend 3 billion yen at its Nagasaki site and 6 billion yen at its Kumamoto site in the current financial year. The remaining 26 billion yen will be spent at Nagasaki in fiscal year 2015.
In January 2014 Sony announced its plans to establish and invest in Yamagata Technology Center (Yamagata TEC) as a facility mainly conducting the mastering process for stacked CMOS image sensors (see Apple Wants More Sony Sensors, Says Nikkei).
The latest investment is expected to enable Sony to complete subsequent stages of production, including the layering process, at Nagasaki TEC on semiconductor chips that have undergone the mastering process at Yamagata TEC, providing Sony with a fully integrated production system for stacked CMOS image sensors.
The stacked image sensor process makes the back-illuminated pixels on a separate wafer to the circuits used for signal processing. Mastering of this stacked structure refers to the manufacture of the photodiodes and wiring the stacked CMOS image sensors together.
This investment forms part of Sony's mid- to long-term plan to increase its total production capacity for image sensors to approximately 75,000 wafers per month, and is expected to increase the current capacity of approximately 60,000 wafers per month to approximately 68,000 wafers per month in August 2015.
Sony was the leading supplier of CMOS image sensors in 2012, according to Yole Developpement. Sony had 21% of the market ahead of Omnivision on 19% and Samsung on 18%.
Originally published on EE Times Europe.